The HEF4020B is a 14-stage binary counter. This device contains a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (Q0, and Q3 to Q13). It ...

The HEF4024B is a seven-stage binary ripple counter that features fully static operation and standardized symmetrical output characteristics. The device complies with JEDEC standard JESD 13-B and ...